Over the past 15 years, alternative materials like graphene and carbon nanotubes (CNTs) have been touted as potential solutions to the silicon scaling problems that have left existing microprocessors largely stuck between 3.5 – 5GHz. In both cases, research into the new materials has struggled to create products that could be commercialized. Neither has advanced to the point where they could be integrated into large scale manufacturing. Researchers at the University of Wisconsin have recently announced a breakthrough, however — one that could lead, in the long term, to profitable solutions that incorporate carbon nanotubes in shipping products.
One of the critical problems facing carbon nanotubes is the difficulty of putting themprecisely where they’re needed. In the past, manufacturers have achieved 88-94% precision. In 2013, we wrote about a new sorting method that could achieve 95-98% precision — still well below the estimated 99.96% precision the ITRS roadmaps at the time had estimated would be required for commercial manufacturing. Now, the University of Wisconsin has claimed it can achieve purity rates of up to 99.98%.
The paper, published in Science Advances notes:
[Constraints] in CNT sorting, processing, alignment, and contacts give rise to nonidealities when CNTs are implemented in densely packed parallel arrays such as those needed for technology… In each scenario, the result has been that, whereas CNTs are ultimately expected to yield FETs that are more conductive than conventional semiconductors for logic applications, CNTs, instead, have underperformed channel materials, such as Si, by sixfold or more. Likewise, in RF applications, depressed on-state conductance and imperfect saturation characteristics arising from metallic CNTs and inter-CNT interactions have limited the maximum frequency of oscillation and linearity.
The paper goes on to note how even a single metallic CNT can short-circuit a FET (Field Effect Transistor) and result in substantially reduced performance. Building arrays of CNTs at exceptionally high purity isn’t optional — it’s been a fundamental stumbling block that companies like IBM have sought to solve for years. In order to reach this milestone, the Wisconsin team uses a technique it first discussed in 2014 — floating evaporative self-assembly, as shown below.
Here’s how the team describes its findings.
CNT array FETs are demonstrated here with an on-state conductance of 1.7 mS μm−1 and a conductance per CNT as high as 0.46 G0, which is seven times higher than previous state-of-the-art CNT array FETs made by other methods. These FETs are nearing the performance of state-of-the-art single CNT FETs but in the format of an array in which quasi-ballistic transport is simultaneously driven through many, tightly packed CNTs in parallel, substantially improving the absolute current drive of the FETs and, therefore, their utility in technologies.
The exceptional performance of the arrays achieved here is attributed to the combined outstanding alignment and spacing of the CNTs, the postdeposition treatment of the arrays to remove solvent residues and the insulating side chains of the polymers that wrap the CNTs, and the exceptional electronic-type purity of the semiconducting CNTs afforded by the use of polyfluorenes as CNT-differentiating agents. The performance of previous CNT array FETs has not been as high, likely because these FETs have not simultaneously met all of these attributes.
The team believes it has a path forward to continue improving CNT FETs and scaling them up to meet modern semiconductor manufacturing. The difficulty of this step, however, can’t be overstated. Right now, the University of Wisconsin is working with one-inch square wafers. Traditional wafers are between 200-300mm — vastly larger than the tiny squares of test material that the UW team worked with. The team also benchmarked its results against 90nm MOSFETs — and while that’s not a bad choice for a lab test, current semiconductor manufacturing left 90nm behind more than ten years ago.
If carbon nanotubes could be commercialized, it could kickstart semiconductor scaling again, at least for certain applications. But the road between even this breakthrough and mass commercialization is still a long one — don’t expect to see CNTs shipping in logic for another 5-10 years, if it ever does. Other niche applications may find more immediate benefits. But CPUs and SoCs tend to sit at the very forefront of our technology curve. That makes it comparatively difficult for new technology to offer large enough improvements to overtake the industry.